May 2021 eLog

2021-05-25

Author: Massimo

• Following suggestion by F. Licciulli, checked voltage regulators on FPGA board (U3, U6, U7). U3 has 5V in input and should output 3.3V but it does not, and it is incandencent, needs to be replaced. U7 is fine (2.5V output) and U3 cannot tell (Vin is 3.3 from U6 Vout)
  • Note: be careful when unsoldering U6, not to destroy copper (huge plane, needs a lot of heat)

2021-05-24

Author: Colin, Massimo

• Started to try testing writing with /home/ctalab/software/SMART/CTA2_sw_simple/host_sw/CTA_script.txt
  • Massimo provided the following for working with the code:
    • If you run simply ./CTA it will provide the help menu
    • The file CTA_script.txt provides a series of basic commands to reset and program registers:
      • ./CTA -reset #SMART reset
        ./CTA -write 0 100 #Set SiPM Fine bias DAC for Ch0
        ./CTA -write 1 100
        ./CTA -write 2 100
        ./CTA -write 3 100
        ./CTA -write 4 100
        ./CTA -write 5 100
        ./CTA -write 6 100
        ./CTA -write 7 100
        ./CTA -write 8 100
        ./CTA -write 9 100
        ./CTA -write 10 100
        ./CTA -write 11 100
        ./CTA -write 12 100
        ./CTA -write 13 100
        ./CTA -write 14 100
        ./CTA -write 15 100
        ./CTA -write 16 100
        ./CTA -write 17 100 #Set SiPM Fine bias DAC for Ch17
        ./CTA -write 18 64 #Channels 0-7 enable
        ./CTA -write 19 255 #Channels 8-15 enable
        ./CTA -write 20 255 #Channels 16-17 enable
        ./CTA -write 21 16 #TZ-R setting 0-255
        ./CTA -write 22 5 #TZ-C setting 0-63
        ./CTA -write 23 40 #PZ setting 0-63
        ./CTA -write 24 6 #Slow mon mux channel selection 0-15
    • In order to program/read a single register, commands read/write can be singularly called
    • Some other commands and notes
      • dump: reads sequentially SMART’s 25 registers
        • registers
        • 0-15 → SMART’ s 16 channels (DAC, low-side voltage)
        • 16 → apparently of no use
        • 17 → reference line going into the diff amplifier one channel at a time
        • 18/19 → needed to enable, disable
          • 8-bit registers, single channel → 18 controls 0-7, 19 controls chs 8-15
        • 20 → ?
        • 21/22/23: R(gain resistor → 8 bits, 0-255)/C(bandwith, 6 bit)/PZ(tail suppression – 6 bit)
        • 24 mux
        • 25 ADC
      • NOTE: in order to read ADC, you have to use the command “read_adc”, “read” reads only one byte instead
      • Before starting: use ./CTA -calib
      • QUESTION: should we repeat it for ham SiPMs??? maybe not, let’s start with the values we have already
      • Commands to try with dry run (SiPMs disconnected)
        • reset
        • calib
        • read
        • write
        • read_adc
• Got it running by doing: sudo ip route add 192.168.6.15 dev enp3s0
• Output from CTA_script
  • ctalab@ctalab-Precision-3630-Tower:~/software/SMART/CTA2_sw_simple/host_sw$ ./CTA_script.txt
    Reset
    Wrote SPI reg 0 with 100- read back 100
    Wrote SPI reg 1 with 100- read back 100
    Wrote SPI reg 2 with 100- read back 100
    Wrote SPI reg 3 with 100- read back 100
    Wrote SPI reg 4 with 100- read back 100
    Wrote SPI reg 5 with 100- read back 100
    Wrote SPI reg 6 with 100- read back 100
    Wrote SPI reg 7 with 100- read back 100
    Wrote SPI reg 8 with 100- read back 100
    Wrote SPI reg 9 with 100- read back 100
    Wrote SPI reg 10 with 100- read back 100
    Wrote SPI reg 11 with 100- read back 100
    Wrote SPI reg 12 with 100- read back 100
    Wrote SPI reg 13 with 100- read back 100
    Wrote SPI reg 14 with 100- read back 100
    Wrote SPI reg 15 with 100- read back 100
    Wrote SPI reg 16 with 100- read back 100
    Wrote SPI reg 17 with 100- read back 100
    Wrote SPI reg 18 with 64- read back 64
    Wrote SPI reg 19 with 255- read back 255
    Wrote SPI reg 20 with 255- read back 255
    Wrote SPI reg 21 with 16- read back 16
    Wrote SPI reg 22 with 5- read back 5
    Wrote SPI reg 23 with 40- read back 40
    Wrote SPI reg 24 with 6- read back 6
    CTA chip registers
    Dac_0: 100
    Dac_1: 100
    Dac_2: 100
    Dac_3: 100
    Dac_4: 100
    Dac_5: 100
    Dac_6: 100
    Dac_7: 100
    Dac_8: 100
    Dac_9: 100
    Dac_10: 100
    Dac_11: 100
    Dac_12: 100
    Dac_13: 100
    Dac_14: 100
    Dac_15: 100
    Dac_16: 100
    Dac_17: 100
    EN0_7: 64
    EN8_15: 255
    EN16_18: 255
    R_ADJ: 16
    C_ADJ: 5
    PZ_ADJ: 40
    MUX: 6
    ADC: 168
• Right after running the script successfully, a capacitor blew on the FPGA board
  • Appears to have been capacitor C3

2021-05-20

Author: Colin, Massimo

• Acquired a number of cables to hookup to the adapter board and FPGA
  • Connections:
    • Three 5 V connections
      • Two on adapter board
      • One on FPGA
    • One 70 V connection on adapter board for SiPMs
      
  • Twisted all cables
  • All 5 V connections are emerging from same PSU, connected in parallel at the devices
  • 70 V connection is coming from the dual PSU hooked up in series as below
• Next:
  • Program the SMART board with the FPGA via a connection from the FPGA to the adapter board
  • Hook up adapter board to scope, power the flasher, close the dark box, power SiPM(s), see some pulses

2021-05-13

Author: Colin

• Figuring out how to hook up the TTi CPX400DP power supply unit in series to get the 70 V we need
  • Specs are here, manual here
  • Seems like it really shouldn't be a big deal, just hook up like:
    • 

Colin Adams - 2021-05-13

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