Difference: AnalogTestboard (10 vs. 11)

Revision 112019-10-14 - DanielWilliams

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Analog Testboard

This TWiki aims to gather all resources regarding the analog testboard, an integration test of the readout electronics for the High-Luminosity LHC upgrade to the ATLAS Liquid Argon calorimeter.

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Board Number Location
E149372 Nevis
E149373 Nevis
Changed:
<
<
E149374 Nevis
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E149374 Nevis
 
E149375 BNL
E149376 Nevis
E149377 Nevis
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  2. Even/Odd ADC. All ADCs have a preference for the LSB to have a value of 1, resulting in more odd ADC count values than even. Extent of this preference is very dependent on the values of pots P15 and P16, which control the positive and negative reference voltages of the SAR.
  • Should have: VREFN_SAR = 0.1, VREFP_SAR 1.1V

Changed:
<
<
Symptom:

hist_pedestal_ADC2_Channel1.png

3. Clock Feedthrough (CFT). Pulses from on board pulser contain an extra injected charge that comes from clock signal passing through analog switch. This "clock feedthrough" does not scale with DAC setting and is not expected to have a shape that is the same as that of the pulse. As a result, all pulses are a sum of the true pulse shape and this CFT offset, distorting the shape and affecting the linearity of the pulse height to DAC setting. This is particularly noticeable at the lowest DAC settings, where the CFT constitutes a significant fraction of the total pulse.

Symptom:

Nonlinearity_percent_differential_low_gain.png

4. DAC Stuck/Misaligned. When powering up, or occasionally during operation, the DAC will get stuck in a bad operational state. This is indicated by the DAC readback function, which checks the equality of the SPI instruction that is sent and readback. If the following error comes up during data-taking, it is recommended to power cycle the board (resetting the DAC).

>
>
Symptom:

hist_pedestal_ADC2_Channel1.png

3. Clock Feedthrough (CFT). Pulses from on board pulser contain an extra injected charge that comes from clock signal passing through analog switch. This "clock feedthrough" does not scale with DAC setting and is not expected to have a shape that is the same as that of the pulse. As a result, all pulses are a sum of the true pulse shape and this CFT offset, distorting the shape and affecting the linearity of the pulse height to DAC setting. This is particularly noticeable at the lowest DAC settings, where the CFT constitutes a significant fraction of the total pulse.

Symptom:

Nonlinearity_percent_differential_low_gain.png

4. DAC Stuck/Misaligned. When powering up, or occasionally during operation, the DAC will get stuck in a bad operational state. This is indicated by the DAC readback function, which checks the equality of the SPI instruction that is sent and readback. If the following error comes up during data-taking, it is recommended to power cycle the board (resetting the DAC).

  Symptom:
 
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