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!i10b 1
!s100 iEjaz]1OUTF:Y^LQ[n;BS1
INiCKD`>]M>TmjeJSk3Em=3
R0
Z16 w1539279008
8../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_bit_ctrl.v
F../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_bit_ctrl.v
!i122 16
L0 133 406
R3
R4
r1
!s85 0
31
R5
!s107 ../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_defines.v|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/timescale.v|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_bit_ctrl.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_bit_ctrl.v|
!i113 0
R6
R1
vi2c_master_byte_ctrl
R2
!i10b 1
!s100 L?gMQT7Ah]5>L`1Z;IO=T3
IJ?NzBfdPL8N]JBKicmT2M0
R0
R16
8../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_byte_ctrl.v
F../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_byte_ctrl.v
!i122 17
L0 75 270
R3
R4
r1
!s85 0
31
R5
!s107 ../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_defines.v|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/timescale.v|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_byte_ctrl.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_byte_ctrl.v|
!i113 0
R6
R1
vi2c_master_top
R2
!i10b 1
!s100 zAb9?Ml4aPMafiRd7n6kZ2
IjFWSU2>go9QmQk@bh5km:2
R0
R16
8../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_top.v
F../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_top.v
!i122 15
L0 79 223
R3
R4
r1
!s85 0
31
R5
!s107 ../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_defines.v|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/timescale.v|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_top.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|../init_pwr_up_fpga/I2C_master_controller/i2c/i2c/rtl/verilog/i2c_master_top.v|
!i113 0
R6
R1
vi2c_slave
R11
!i10b 1
!s100 =OzXKZZP4DYFSB6TQNVFK2
I:=Xne^=WZ8fYLK6T`=o:_3
R0
w1623761356
8../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_slave_TMR.v
F../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_slave_TMR.v
!i122 7
L0 10 213
R3
R4
r1
!s85 0
31
R12
!s107 ../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_slave_TMR.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_slave_TMR.v|
!i113 0
R6
R1
vi2c_slave_iostate
R11
!i10b 1
!s100 AKaQXE_b3>8?F`dO[b8]n3
IK;6fC6d?iHgC@IaSdCMnZ1
R0
R15
8../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_slave_iostate.v
F../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_slave_iostate.v
!i122 6
L0 7 121
R3
R4
r1
!s85 0
31
R12
!s107 ../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_slave_iostate.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_slave_iostate.v|
!i113 0
R6
R1
vI2C_synchronizer
R11
!i10b 1
!s100 NW]IZzce:YJT>lQYOVOPZ3
I0kBISO_?5LXe1]=37B:ZN0
R0
w1625223632
8../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_synchronizer.v
F../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_synchronizer.v
!i122 8
L0 3 45
R3
R4
r1
!s85 0
31
R12
!s107 ../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_synchronizer.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_synchronizer.v|
!i113 0
R6
R1
n@i2@c_synchronizer
vi2c_to_mem_interface
R2
!i10b 1
!s100 ehU978gJOBklI9@egAgAm0
IU`R:M1EKC9a]kWRB[6RZI0
R0
w1629894520
8../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_to_mem_interface.v
F../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_to_mem_interface.v
!i122 10
L0 52 323
R3
R4
r1
!s85 0
31
R5
!s107 ../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_to_mem_interface.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/i2c_to_mem_interface.v|
!i113 0
R6
R1
vin_pll
R7
!i10b 1
!s100 :9hfKg3cUnn29E[8>jBZ_3
ITJ]RCa`d2G;dn^>FhZBgz1
R0
w1633517116
8C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/in_pll.v
FC:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/in_pll.v
!i122 26
Z17 L0 40 148
R3
R4
r1
!s85 0
31
R9
!s107 C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/in_pll.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/in_pll.v|
!i113 0
R6
R1
vinit_feb_power_tester
R13
!i10b 1
!s100 _ZGb2o`U]A5Hazkmn<7^k2
I3;=Ea51eUnd:?n@z=B_1[3
R0
w1673966579
8init_feb_power_tester.v
Finit_feb_power_tester.v
!i122 40
L0 11 1133
R3
R4
r1
!s85 0
31
R14
!s107 init_feb_power_tester.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|init_feb_power_tester.v|
!i113 0
R6
R1
vinit_pwr_up_fpga
R13
!i10b 1
!s100 ^_gflnJU4hXR<dIc2k=CP1
I;50E=MUblSDTG;HG;1[RM2
R0
w1673967038
8C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/init_pwr_up_fpga.v
FC:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/init_pwr_up_fpga.v
!i122 37
L0 32 884
R3
R4
r1
!s85 0
31
R14
!s107 C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/init_pwr_up_fpga.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/init_pwr_up_fpga.v|
!i113 0
R6
R1
vmajority_voter
R2
!i10b 1
!s100 WFDd8aCnjB>Y>j?:c9z?m1
I@aWkK7E;jCP1^XhKFVMeF1
R0
R15
8../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/majority_voter.v
F../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/majority_voter.v
!i122 9
L0 8 45
R3
R4
r1
!s85 0
31
R12
!s107 ../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/majority_voter.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|../../../Nevis_65n_ADC/Nevis_65n_ADC/COLUTA_V4/digital/coluta_i2c/Source_files/majority_voter.v|
!i113 0
R6
R1
vpedestal
R7
!i10b 1
!s100 `kdD@fPO8FJ:Id[O3Q@nL0
IafX`8fiJkCABZ6f]Ul0h73
R0
R8
8C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pedestal.v
FC:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pedestal.v
!i122 28
L0 7 43
R3
R4
r1
!s85 0
31
R9
!s107 C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pedestal.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pedestal.v|
!i113 0
R6
R1
vpll_40MHz
R7
!i10b 1
!s100 Reig^he43S4N;Cg<NNBa13
IXY3WDPcm4_<H`Z0[Pg6373
R0
w1633517096
8C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pll_40MHz.v
FC:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pll_40MHz.v
!i122 25
L0 40 124
R3
R4
r1
!s85 0
31
R9
!s107 C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pll_40MHz.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pll_40MHz.v|
!i113 0
R6
R1
npll_40@m@hz
vpll_640MHz
R7
!i10b 1
!s100 c]JiL?[Y_h721H_I[@z_k2
IAQRSjcVHzBCWk2=WmM>b<3
R0
w1633517136
8C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pll_640MHz.v
FC:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pll_640MHz.v
!i122 23
R17
R3
R4
r1
!s85 0
31
R9
!s107 C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pll_640MHz.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|C:\Users\Jaro\Documents\FEB2\FEB2_PCB\init_pwr_up_fpga/pll_640MHz.v|
!i113 0
R6
R1
npll_640@m@hz
vserializer_16bit
R2
!i10b 1
!s100 NEZ<dn>:Y1IOY5SlUQK5]2
IAf;nS7?UM@c;2XK;;6WcH0
R0
w1561912454
8C:\Users\Jaro\Documents\NEVIS_65n_ADC\NEVIS_65n_ADC\COLUTA_V3\digital\ddpu\Source_files/serializer_16bit.v
FC:\Users\Jaro\Documents\NEVIS_65n_ADC\NEVIS_65n_ADC\COLUTA_V3\digital\ddpu\Source_files/serializer_16bit.v
!i122 14
L0 15 162
R3
R4
r1
!s85 0
31
R5
!s107 C:\Users\Jaro\Documents\NEVIS_65n_ADC\NEVIS_65n_ADC\COLUTA_V3\digital\ddpu\Source_files/serializer_16bit.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|C:\Users\Jaro\Documents\NEVIS_65n_ADC\NEVIS_65n_ADC\COLUTA_V3\digital\ddpu\Source_files/serializer_16bit.v|
!i113 0
R6
R1
vUSB_I2C_state_machine
R13
!i10b 1
!s100 5La]WT<:i>VnAS;V]g^A^3
Ie>NJHXUnXZ54ecWEOAQg`2
R0
w1638790862
8USB_I2C_state_machine.v
FUSB_I2C_state_machine.v
!i122 38
L0 10 513
R3
R4
r1
!s85 0
31
R14
!s107 USB_I2C_state_machine.v|
!s90 -reportprogress|300|-vlog01compat|+acc|-work|work|USB_I2C_state_machine.v|
!i113 0
R6
R1
n@u@s@b_@i2@c_state_machine
